ASM International (Belgium)
companyLeuven, Belgium
Research output, citation impact, and the most-cited recent papers from ASM International (Belgium) (Belgium). Aggregated across the NobleBlocks index of 300M+ scholarly works.
Top-cited papers from ASM International (Belgium)
The electronic properties of two-dimensional honeycomb structures of molybdenum disulfide (MoS2) subjected to biaxial strain have been investigated using first-principles calculations based on density functional theory. On applying compressive or tensile bi-axial strain on bi-layer and mono-layer MoS2, the electronic properties are predicted to change from semiconducting to metallic. These changes present very interesting possibilities for engineering the electronic properties of two-dimensional structures of MoS2.
Differences in Si surface passivation by aluminum oxide Al 2 O 3 films synthesized using H 2 O and O 3 -based thermal atomic layer deposition ALD and plasma ALD have been revealed. A low interface defect density of D it = 10 11 eV -1 cm -2 was obtained after annealing, independent of the oxidant. This low D it was found to be vital for the passivation performance. Field-effect passivation was less prominent for H 2 O-based ALD Al 2 O 3 before and after annealing, whereas for as-deposited ALD films with an O 2 plasma or O 3 as the oxidants, the field-effect passivation was impaired by a very high D it .
Atomic layer deposition (ALD) is used in applications where inorganic material layers with uniform thickness down to the nanometer range are required. For such thicknesses, the growth mode, defining how the material is arranged on the surface during the growth, is of critical importance. In this work, the growth mode of the zirconium tetrachloride∕water and the trimethyl aluminum∕water ALD process on hydrogen-terminated silicon was investigated by combining information on the total amount of material deposited with information on the surface fraction of the material. The total amount of material deposited was measured by Rutherford backscattering, x-ray fluorescence, and inductively coupled plasma–optical emission spectroscopy, and the surface fractions by low-energy ion scattering. Growth mode modeling was made assuming two-dimensional growth or random deposition (RD), with a “shower model” of RD recently developed for ALD. Experimental surface fractions of the ALD-grown zirconium oxide and aluminum oxide films were lower than the surface fractions calculated assuming RD, suggesting the occurrence of island growth. Island growth was confirmed with transmission electron microscopy (TEM) measurements, from which the island size and number of islands per unit surface area could also be estimated. The conclusion of island growth for the aluminum oxide deposition on hydrogen-terminated silicon contradicts earlier observations. In this work, physical aluminum oxide islands were observed in TEM after 15 ALD reaction cycles. Earlier, thicker aluminum oxide layers have been analyzed, where islands have not been observed because they have already coalesced to form a continuous film. The unreactivity of hydrogen-terminated silicon surface towards the ALD reactants, except for reactive defect areas, is proposed as the origin of island growth. Consequently, island growth can be regarded as “undesired surface-selective ALD.”
Plasma-assisted atomic layer deposition (ALD) was used to deposit SiO2 films in the temperature range of Tdep = 50–400°C on Si(100). H2Si[N(C2H5)2]2 and an O2 plasma were used as Si precursor and oxidant, respectively. The ALD growth process and material properties were characterized in detail. Ultrashort precursor doses (~50 ms) were found to be sufficient to reach self-limiting ALD growth with a growth-per-cycle of ~1.2 Å (Tdep = ~200°C) leading to SiO2 films with O/Si ratio of ~2.1. Moreover, the plasma ALD process led to a high conformality (95–100%) for trenches with aspect ratios of ~30. In addition, the electronic (interface) properties of ultrathin ALD SiO2 films and ALD SiO2/Al2O3 stacks were studied by capacitance-voltage and photoconductance decay measurements. The interface quality associated with SiO2 was improved significantly by using an ultrathin ALD Al2O3 capping layer and annealing. The interface defect densities decreased from ~1×1012 eV-1 cm-2 (at mid gap) for single layer SiO2 to <1011 eV-1 cm-2 for the stacks. Correspondingly, ultralow surface recombination velocities <3 cm/s were obtained for n-type Si. The density and polarity of the fixed charges associated with the stacks were found to be critically dependent on the SiO2 thickness (1–30 nm).
In this paper, an overview of today's status and progress, as well as tomorrow's challenges and trends, in the field of advanced nonvolatile memories based on discrete traps is given. In particular, unique features of silicon nanocrystal and SONOS memories will be illustrated through original recent data. The main potentials and main issues of these technologies as candidates to push further the scaling limits of conventional floating-gate Flash devices will be evaluated.
For the first time, memory devices with optimized high density (2E12#/cm/sup 2/) LPCVD Si nanocrystals have been reproducibly achieved and studied on an extensive statistical basis (from single cell up to 1 Mb test-array) under different programming conditions. An original experimental and theoretical analysis of the threshold voltage shift distribution shows that Si nanocrystals have serious potential to push the scaling of NOR and NAND flash at least to the 35 nm and 65 nm nodes, respectively.
Abstract Understanding the growth mechanisms during the early stages of atomic layer deposition (ALD) is of interest for several applications including thin film deposition, catalysis, and area‐selective deposition. The surface dependence and growth mechanism of (ethylbenzyl)(1‐ethyl‐1,4‐cyclohexadienyl)ruthenium and O 2 ALD at 325 °C on HfO 2 , Al 2 O 3 , OH, and SiOSi terminated SiO 2 , and organosilicate glass (OSG) are investigated. The experimental results show that precursor adsorption is strongly affected by the surface termination of the dielectric, and proceeds most rapidly on OH terminated dielectrics, followed by SiOSi and finally SiCH 3 terminated dielectrics. The initial stages of growth are characterized by the formation and growth of Ru nanoparticles, which is mediated by the diffusion of Ru species. Mean‐field and kinetic Monte Carlo modeling show that ALD on OSG is best described when accounting for (1) cyclic generation of new nanoparticles at the surface, (2) surface diffusion of both atomic species and nanoparticles, and (3) size‐dependent nanoparticle reactivity. In particular, the models indicate that precursor adsorption initially occurs only on the dielectric substrate, and occurs on the Ru nanoparticles only when these reach a critical size of about 0.85 nm. This phenomenon is attributed to the catalytic decomposition of oxygen requiring a minimum Ru nanoparticle size.
In this paper, three electrical techniques (frequency dependent conductance analysis, AC transconductance (AC-gm), and positive gate bias stress) were used to evaluate three different gate dielectrics (Plasma-Enhanced Atomic Layer Deposition Si3N4, Rapid Thermal Chemical Vapor Deposition Si3N4, and Atomic Layer Deposition (ALD) Al2O3) for AlGaN/GaN Metal-Insulator-Semiconductor High-Electron-Mobility Transistors. From these measurements, the interface state density (Dit), the amount of border traps, and the threshold voltage (VTH) shift during a positive gate bias stress can be obtained. The results show that the VTH shift during a positive gate bias stress is highly correlated to not only interface states but also border traps in the dielectric. A physical model is proposed describing that electrons can be trapped by both interface states and border traps. Therefore, in order to minimize the VTH shift during a positive gate bias stress, the gate dielectric needs to have a lower interface state density and less border traps. However, the results also show that the commonly used frequency dependent conductance analysis technique to extract Dit needs to be cautiously used since the resulting value might be influenced by the border traps and, vice versa, i.e., the gm dispersion commonly attributed to border traps might be influenced by interface states.
In this letter, we propose an effective route to reduce the cell-to-cell variability in 1T-1R-based random access memories (RRAM) arrays by combining the excellent switching performance of Hf <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">y</sub> with an optimized incremental step pulse with verify algorithm for programming. The strongly reduced cell-to-cell variability improves the thermal and post-programming stability of the arrays, which is relevant for many applications of the RRAM technology. Finally, the retention study at 150 °C enables the prediction of the data storage capability.
In this work, the physical and electrical properties of SrxTi1−xOy (STO)-based metal-insulator-metal capacitors (MIMcaps) with various compositions are studied in detail. While most recent studies on STO were done on noblelike metal electrodes (Ru, Pt), this work focuses on a low temperature (250 °C) atomic layer deposition (ALD) process, using an alternative precursor set and carefully optimized processing conditions, enabling the use of low-cost, manufacturable-friendly TiN electrodes. Physical analyses show that the film crystallization temperature, its texture and morphology strongly depends on the Sr/Ti ratio. Such physical variations have a direct impact on the electric properties of SrxTi1−xOy based capacitors. It is found that Sr-enrichment result in a monotonous decrease in the dielectric constant and leakage current as predicted by ab initio calculations. The intercept of the EOT vs physical thickness plot further indicates that increasing the Sr-content at the film interface with the bottom TiN would result in lower interfacial equivalent-oxide thickness.
Strontium titanate (STO) is a promising candidate as a high- dielectric for dynamic random access memory application. STO thin films are deposited by atomic layer deposition using , , and as precursors. Growth and saturation behavior of STO and binary oxides are evaluated by ellipsometry thickness measurements. The precursor pulse ratio controls the amount of Sr and Ti incorporated in STO films. Stoichiometric is characterized by the lowest crystallization temperature and largest refractive index, density, and dielectric constant. An excess of Ti or Sr results in an increase in the crystallization onset temperature and contraction or expansion of the cubic cell constant of perovskite . Incorporation of more Sr in STO reduces the leakage current density but also increases the capacitance-equivalent thickness.
This paper reports a comprehensive time dependent dielectric breakdown (TDDB) evaluation of recessed-gate devices with five different AlGaN barrier thicknesses with characteristics ranging from a D-mode MIS-HEMT to an E-mode MIS-FET. First, the fitted parameter β (the slope of the Weibull distribution) was smaller for a deeper recessed gate and larger for a thicker gate dielectric. Secondly, the extrapolated V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> (criterium of 0.01% failures after 20 years) for the devices with Wg (gate width) = 10μm was lower when less AlGaN barrier remains under the gate. However, the extrapolated V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> was increased when the AlGaN barrier was completely removed. Thirdly, a deeper recessed gate could result in a dominant percolation path due to a thinner gate dielectric on the sidewall of the gate recess edge. Fourthly, the Weibull distribution could scale with the gate width, indicating an intrinsic failure. Finally, the lifetime was extrapolated to 0.01% of failures for W <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</inf> =36mm at 150 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">o</sup> C after 20 years by fitting the data with a power law or an exponential law to gate voltages of 4.9V and 7.2V, respectively.
GdxHf1-xOy thin films were deposited by atomic layer deposition (ALD) using tris(isopropyl-cyclopentadienyl) gadolinium [Gd((PrCp)-Pr-i)(3)] and HfCl4 in combination with H2O as an oxidizer. Growth curves showed a nearly ideal ALD behavior. The growth per individual Gd((PrCp)-Pr-i)(3)/H2O or HfCl4/H2O cycle was 0.55 A degrees, independent of the Gd/(Gd+Hf) composition x in the studied range. This indicates that the amount of HfO2 deposited during a HfCl4/H2O cycle was essentially identical to the amount of Gd2O3 deposited during a Gd((PrCp)-Pr-i)(3)/H2O cycle, assuming identical atomic densities of the films independent of composition. The crystallization of GdxHf1-xOy with Gd/(Gd+Hf) contents x between 7 and 30% was studied. Films with x greater than or similar to 10% crystallized into a cubic/tetragonal HfO2-like phase during spike or laser annealing up to 1300 degrees C, demonstrating that the cubic/tetragonal phase is thermally stable in this temperature range. A maximum dielectric constant of kappa similar to 36 was found for a Gd/(Gd+Hf) concentration of x similar to 11%.
Growth of high quality Si1−y−zCyPz (SiCP) with high substitutional carbon levels has been demonstrated. Growth rates up to 82 nm min−1 (at 550 °C) led to films incorporating up to 3.6% substitutional carbon [C]VL according to Vegard's law (VL) or 2.8% [C]KB after Kelieres/Berti (KB). The films were fully strained with no sign of relaxation and displayed stress well above 2 GPa. Optionally, these films can be heavily doped with P, which then results in resistivities as low as 0.5 mΩ cm. The α/epi growth rate ratio was optimized to 1. This high throughput SiCP epitaxial growth process is an excellent candidate to be combined with a selective etch process. Used with repeated deposition/etch cycles, the final result will be identical to a true selective epitaxial growth process, but without any loading effect on [C] or [P] due to the blanket deposition steps.
With the continuous scaling of resistive random access memory (RRAM) devices, in-depth understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production. We demonstrate a systematic study on TiN/Ti/HfO2/TiN/Si RRAM devices to correlate key material factors (nano-crystallites and carbon impurities) with the filament type resistive switching (RS) behaviours. The augmentation of the nano-crystallites density in the film increases the forming voltage of devices and its variation. Carbon residues in HfO2 films turn out to be an even more significant factor strongly impacting the RS behaviour. A relatively higher deposition temperature of 300 °C dramatically reduces the residual carbon concentration, thus leading to enhanced RS performances of devices, including lower power consumption, better endurance and higher reliability. Such thorough understanding on physical mechanism of RS and the correlation between material and device performances will facilitate the realization of high density and reliable embedded RRAM devices with low power consumption.
We show how interfacial oxide engineering in La-doped hafnium zirconate (HZO) ferroelectric (FE) capacitor stacks can be used to significantly improve the ferroelectric response and remnant polarization (P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</inf> ) of the HZO. This is achieved by incorporating either a 1 nm TiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> seed and/or 2 nm Nb <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</inf> cap layer in a bilayer (BL) and/or trilayer (TL) configuration with TiN top and bottom electrodes. We show how the Nb <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</inf> cap is able to facilitate the transition from (anti-FE) tetragonal into (FE) orthorhombic phase by injecting oxygen in the HZO and find that the TiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> seed layer favorably improves the grain orientation inside the HZO, resulting in a higher 2P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</inf> and reduced wake-up. Finally, depending on the precursors of Hf and Zr that are used, we demonstrate both trilayer devices with an endurance of up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> cycles with a final 2P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</inf> of ~30μC/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at 1.8 MV/cm or devices with a record high 2P <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R,max</inf> of 66.5 μ C/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> after 3× 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> cycles at 3 MV/cm.
As contact resistance becomes a bottle-neck in scaled CMOS devices, there is a need for source/drain epitaxy with maximum dopant concentrations and optimized contacting schemes. In this paper we discuss the use of highly doped Si:P layers for the Source/Drain formation in Si bulk FinFETs. We report on the macroscopic and microscopic properties of the Si:P layers and discuss the details of the microstructure and the manifestation of Phosphorus-Vacancy complexes at high Phosphorus concentrations. We analyze how a post-epi thermal budget like spike or laser annealing modifies the microstructure and leads to an enhanced P activation and diffusion. We also zoom in on some of the integration aspects of the Si:P layers and discuss the benefit of the high-P concentration for the contact resistivity and the final device performance.
Uniaxial stressors have received much interest over the last few years as a method to enhance carrier mobility and, hence, drive current with minimal modification to the structure of the transistor. However, the shift in device design to complex structures with multiple crystallographic orientations like advanced bulk-FinFETs has significantly complicated the incorporation of mobility enhancing stressors. For the n-FinFET in particular, it turns out that the crystal quality and growth rate of Si:P and Si:C:P films can be strongly dependent upon the crystallographic orientation of the starting surface. Both for raised and recessed epi we find that formation of (111) facets and twin defects occurs already after a limited growth on the fin. Besides the growth on raised and recessed fins, we also discuss the resistivity increase in Si:C:P layers as a function of carbon content and demonstrate that laser annealed Si:P films with high phosphorus content (e.g. 4% or higher) can be considered as potential alternatives to Si:C:P with a lower resistivity for the same strain.
A vertical cylindrical SONOS cell with a novel bilayer polysilicon channel down to 22-nm diameter for 3-D NAND Flash memory is successfully developed. We introduce a thin amorphous silicon layer along with the oxide-nitride-oxide (ONO) gate stack inside the memory hole. This silicon layer protects the tunnel oxide during opening of the gate stack at the bottom of the memory hole, after which it serves as the first layer of the bilayer polysilicon channel. This approach enables the 3-D architecture to achieve minimum cell area (4 <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</i> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , with <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</i> being the feature size) without the need for the so-called pipeline connections. The smallest functional cells have the memory hole diameter <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</i> = 45 nm, resulting in 22-nm channel diameter. In case 16 cells are stacked, <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</i> = 45 nm would correspond to an equivalent 11-nm planar cell technology node. Excellent program/erase and retention obtained with the all-deposited ONO stack are demonstrated.
Abstract The Resistive RAM (RRAM) technology is currently in a level of maturity that calls for its integration into CMOS compatible memory arrays. This CMOS integration requires a perfect understanding of the cells performance and reliability in relation to the deposition processes used for their manufacturing. In this paper, the impact of the precursor chemistries and process conditions on the performance of HfO 2 based memristive cells is studied. An extensive characterization of HfO 2 based 1T1R cells, a comparison of the cell-to-cell variability, and reliability study is performed. The cells’ behaviors during forming, set, and reset operations are monitored in order to relate their features to conductive filament properties and process-induced variability of the switching parameters. The modeling of the high resistance state (HRS) is performed by applying the Quantum-Point Contact model to assess the link between the deposition condition and the precursor chemistry with the resulting physical cells characteristics.