Motorola (United Kingdom)

This paper describes a database designed to evaluate the performance of speech recognition algorithms in noisy conditions. The database may either be used to measure frontend feature extraction algorithms, using a defined HMM recognition back-end, or complete recognition systems. The source speech for this database is the TIdigits, consisting of connected digits task spoken by American English talkers (downsampled to 8kHz). A selection of 8 different real-world noises have been added to the speech over a range of signal to noise ratios with controlled filtering of the speech and noise. The framework was prepared as a contribution to the ETSI STQ-AURORA DSR Working Group[1]. Aurora is developing standards for Distributed Speech Recognition (DSR) where the speech analysis is done in the telecommunication terminal and the recognition at a central location in the telecom network. The framework is currently being used to evaluate alternative proposals for front-end feature extraction. The database has been made publicly available through ELRA so that other speech researchers to evaluate and compare the performance of noise robust algorithms. Recognition results will be presented for the first standard DSR feature extraction scheme based on a cepstral analysis. 1.

A block coding scheme for the reduction of the peak to mean envelope power ratio of multicarrier transmission schemes such as OFDM is proposed. The principle of the scheme is illustrated with the specific example of a four-carrier signal. It is shown that the peak to mean envelope power ratio of this signal can be reduced from 6.02 dB to 2.48 dB with a 3/4 rate block code. The application of the block coding principle with flexibility such that the coding rate can be traded against peak to mean envelope power ratio is illustrated with the example of an eight-carrier signal.

We summarize the features of existing semiconductor memories and compare them to Magnetoresistive Random Access Memory (MRAM),a semiconductor memory with magnetic bits for nonvolatile storage. MRAM architectures based on Giant Magnetoresistance (GMR) and Magnetic Tunnel Junction (MTJ) cells are described. This paper will discuss our progress on improving the material structures, memory bits, thermal stability of the bits, and competitive architectures for GMR and MTJ based MRAM memories as well as the potential of these memories in the commercial memory market.

Applications of speech recognition are now widespread, but user-centred evaluation methods are necessary to ensure their success. Objective evaluation techniques are fairly well established, but previous subjective techniques have been unstructured and unproven. This paper reports on the first stage in the development of a questionnaire measure for the Subjective Assessment of Speech System Interfaces (SASSI). The aim of the research programme is to produce a valid, reliable and sensitive measure of users' subjective experiences with speech recognition systems. Such a technique could make an important contribution to theory and practice in the design and evaluation of speech recognition systems according to best human factors practice. A prototype questionnaire was designed, based on established measures for evaluating the usability of other kinds of user interface, and on a review of the research literature into speech system design. This consisted of 50 statements with which respondents rated their level of agreement. The questionnaire was given to users of four different speech applications, and Exploratory Factor Analysis of 214 completed questionnaires was conducted. This suggested the presence of six main factors in users' perceptions of speech systems: System Response Accuracy, Likeability, Cognitive Demand, Annoyance, Habitability and Speed. The six factors have face validity, and a reasonable level of statistical reliability. The findings form a useful theoretical and practical basis for the subjective evaluation of any speech recognition interface. However, further work is recommended, to establish the validity and sensitivity of the approach, before a final tool can be produced which warrants general use.

A block coding scheme for the reduction of the peak to mean envelope power ratio of multicarrier transmission schemes is described. The principle of the scheme is illustrated with the specific example of a four carrier signal. The potential of the technique is investigated and it is shown that the application of a 1/2 rate code could typically result in a peak to mean envelope power ratio of around 3 dB. The development of the technique in terms of the selection of suitable sets of code words based on Shapiro-Rudin sequences, Golay complementary sequences and other larger sets of code words is investigated. However, it is shown that none of these code sets are ideal.

A combined coding scheme for error control and reduced peak to mean envelope power ratio (PMEPR) in OFDM is presented. The proposed scheme and an algorithm for finding the optimum code set for achieving minimum PMEPR is described in detail. The process is illustrated by means of an example, and it is shown that a 4 dB improvement is possible for an (8,4) linear block code. The method is extended to consider larger code sets of lower rate which are expanded through the use of polyphase sequences that are found by means of a natural algorithm. Preliminary results indicate that the PMEPR can be further improved by use of such sequences. Finally, the BER performance of the combined coding method in a typical nonlinear channel is presented.

This paper addresses the problem of determining the next set of releases in the course of software evolution. It formulates both ranking and selection of candidate software components as a series of feature subset selection problems to which search based software engineering can be applied. The approach is automated using greedy and simulated annealing algorithms and evaluated using a set of software components from the component base of a large telecommunications organization. The results are compared to those obtained by a panel of (human) experts. The results show that the two automated approaches convincingly outperform the expert judgment approach

Simulated annealing is a provably convergent optimizer for single-objective problems. Previously proposed multiobjective extensions have mostly taken the form of a single-objective simulated annealer optimizing a composite function of the objectives. We propose a multiobjective simulated annealer utilizing the relative dominance of a solution as the system energy for optimization, eliminating problems associated with composite objective functions. We also propose a method for choosing perturbation scalings promoting search both towards and across the Pareto front. We illustrate the simulated annealer's performance on a suite of standard test problems and provide comparisons with another multiobjective simulated annealer and the NSGA-II genetic algorithm. The new simulated annealer is shown to promote rapid convergence to the true Pareto front with a good coverage of solutions across it comparing favorably with the other algorithms. An application of the simulated annealer to an industrial problem, the optimization of a code-division-multiple access (CDMA) mobile telecommunications network's air interface, is presented and the simulated annealer is shown to generate nondominated solutions with an even and dense coverage that outperforms single objective genetic algorithm optimizers.

A segmental-rotor synchronous reluctance motor is used in a variable-speed drive with current-regulated pulse-width-modulated (PWM) control. The low-speed torque capability is compared with that of an induction motor, a switched reluctance motor, and a brushless DC PM motor of identical size and copper weight. A particular point of interest is the comparison of motors of different types, all with essentially the same frame size and tested under identical conditions. The results suggest that many of the desirable properties of the switched reluctance motor can be realized with the synchronous reluctance motor but with using standard AC motor and control components. The torque capability is lower, but so is the noise level.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The authors describe a signal-chip radio receiver for VHF and UHF digital wide-area paging transmissions up to 500 MHz with frequency-shift-keying (FSK) data rates up to 1200 Bd. All channel filtering is on-chip and the IC requires only 28 surface mounted external components and a quartz crystal to make a complete receiver. With -126-dBm sensitivity, 70-dB adjacent channel rejection, and 60-dB intermodulation immunity, it satisfies all known pager specifications, worldwide, using the POCSAG paging code. High-dynamic-range mixers, integrated gyrator filters, small-area high-pass filters, and an efficient FSK demodulator combine to give good performance with a current consumption of only 2.7 mA from a 2-V supply. High-density on-chip capacitors in a bipolar process designed for analog RF applications give a chip size of only 4.6*3.8 mm.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Purpose The purpose of this paper is to define and explore the concept of financial supply chain strategy in a global business environment. The paper aims to illustrate the concepts with a detailed case study of Motorola's global financial supply chain. Design/methodology/approach This is a detailed, longitudinal case study analysis of a focal organisation and its economic partners in a financial supply chain. The case study combines qualitative analysis of the strategy evolution with extensive time‐series data and quantitative analyses of the performance of the financial supply chain. Findings The financial supply chain is an integral component of Motorola's overall supply chain management strategy. Physical product, information systems and financial flows are closely aligned with each other throughout the supply chain incorporating Motorola, its customers, suppliers and banks. The overall trend is towards the development of an integrated global financial supply chain in which cash flows mirror product flows. Motorola shares financial data with its suppliers as part of a cooperative strategy that generates cost savings for Motorola and its suppliers in areas such as foreign exchange and cash balances. The cooperative strategy also improves the quality of the payments process measured by six sigma techniques and produces strategic benefits such as risk reduction for the supply chain as a whole in areas such as foreign exchange and payments. A strategy of this type is only possible by taking a global perspective of the financial supply chain. Research limitations/implications The development of financial supply chains has not been fully addressed in the supply chain management literature. This paper defines this relatively new topic area and explains its significance in its own right, and also in terms of the inter‐relationships between finance and manufacturing supply chains. A research agenda for financial supply chains is proposed that describes a range of new research opportunities in this area. Practical implications The development of integrated financial supply chains will lead to significant savings in terms of funding, banking and administrative costs associated with treasury and payment activities. The implementation and nature of the strategic change also highlight important strategic planning and implementation issues associated with financial supply chains. Originality/value The strategic importance of financial supply chains for business and academic researchers is demonstrated through the definition of this topic and the application of a research framework to a detailed study of Motorola's global financial supply chain using time‐series data of strategy evolution and financial supply chain performance. The research findings and comparison with theory support the assertion that this is a relatively new and unexplored problem area that is of direct relevance and interest to researchers in supply chain management.

The unique characteristics of wireless in-building network (WIN) systems based on microwave radio technology are addressed, focusing on the multipath propagation problem which most distinguishes radio from wired LAN media. This is followed by a discussion of the three principal techniques that have been developed within the radio communication industry to deal with this multipath problem: adaptive equalization, spread spectrum, and antenna diversity. A review of the strengths and weaknesses of each of these techniques reveals that antenna diversity is clearly the preferred choice for use in WIN systems operating in the recently allocated spectrum near 18 GHz. An example of such an antenna system is examined. It is shown how these multiple, directional antenna systems function in three types of environment.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Key technical aspects concerning the realization of a reconfigurable user terminal based on software-defined radio technology are discussed. These include functionalities such as mode monitoring, mode switching, adaptive baseband processing, and software download. The implications of these functionalities and the need for related entities within the network are also discussed. The concepts presented here form part of the 5th Framework IST European Research project Transparent Reconfigurable Ubiquitous Terminal (TRUST). It is the intention of this article to present the technical achievements of the TRUST project together with an overview of the potential complexity in the realization of a reconfigurable user terminal.

This paper is a performance analysis of optimum combining in the presence of multiple equal power interferers and noise when the number of interferers is less than the number of antenna elements. Desired signal and interferers are subject to flat Rayleigh fading, and the propagation channels are independent. An approximate expression of the probability density function of the output signal-to-interference-plus-noise ratio (SINR) is derived analytically. It is then applied to obtain the cumulative distribution function of the SINR, and the bit-error rate (BER) of some binary modulations, including coherent binary phase-shift keying. In the case of a single interferer, an exact analysis is performed to prove the validity of the approximation. In the case of multiple interferers, the accuracy of the approximation is assessed through simulations. Although limited to equipower interferers, this analysis is a convenient way of assessing the performance of optimum combining in some typical situations and comparing it with that of maximal-ratio combining. The final results are remarkably simple and provide a useful complement to previous analyzes, especially in the region of reasonably high BERs which are of practical interest.

An approach to optical packet switching is discussed, which uses small, simplified optical elements for traffic routing, merging, and shaping. The elements are constructed from 2/spl times/2 switches and optical delay lines, and may be implemented in a variety of technologies. They are designed for use with deflection routing, and even when using only six switches in a module, a deflection probability of 2.8/spl times/10/sup -7/ is possible with a load of 0.8. The modules may also be used as 2/spl times/1 mergers where a deflection probability of 10/sup -12/ is possible with six switches and a total load of 0.8. The BER performance of the modules is simulated with respect to crosstalk, with even relatively poor switch devices of -18.5 dB isolation yielding a power penalty of less than 1 dB. A networking strategy radically different from today's is discussed, driven by the need to reduce hardware, software and operating costs.

Heterogeneous networks (het-nets) - comprising of conventional macrocell base stations overlaid with femtocells, picocells and wireless relays - offer cellular operators burgeoning traffic demands through cell-splitting gains obtained by bringing users closer to their access points. However, the often random and unplanned location of these access points can cause severe near-far problems, typically solved by coordinating base-station transmissions to minimize interference. Towards this direction, the 3rd generation partnership project Long Term Evolution-Advanced (3GPP-LTE or Rel-10) standard introduces time-domain inter-cell interference coordination (ICIC) for facilitating a seamless deployment of a het-net overlay. This article surveys the key features encompassing the physical layer, network layer and back-hauling aspects of time-domain ICIC in Rel-10.

The kinetics of phase separation in aqueous two-phase systems have been investigated as a function of the physical properties of the system. Two distinct situations for the settling velocities were found, one in which the light, organic-rich (PEG) phase is continuous and the other in which the heavier, salt-rich (phosphate) phase is continuous. The settling rate of a particular system is a crucial parameter for equipment design, and it was studied as a function of measured viscosity and density of each of the phases as well as the interfacial tension between the phases. Interfacial tension increases with increasing tie line length. A correlation that describes the rate of phase separation was investigated. This correlation, which is a function of the system parameters mentioned above, described the behavior of the system successfully. Different values of the parameters in the correlation were fitted for bottom-phase-continuous and top-phase-continuous systems. These parameters showed that density and viscosity play a role in the rate of separation in both top continuous- and bottom continuous-phase regions but are more dominant in the continuous top-phase region. The composition of the two-phase system was characterized by the tie line length. The rate of separation increased with increasing tie line length in both cases but at a faster rate when the bottom (less viscous) phase was the continuous phase. These results show that working in a continuous bottom-phase region is advantageous to ensure fast separation.

Infrared spectroscopy in the OH stretching region has been used to determine the extent of proton exchange in x- and z-cut lithium niobate as a function of temperature and time. The behavior observed is consistent with the occurrence of a diffusion-limited process within LiNbO/sub 3/. Apparent activation energies for the process determined from infrared spectroscopic measurements are consistent with the existence of a minimum exchange temperature and show that a relationship exists between waveguide depth and absorption band area. The measurements are also shown that hydrogen-bonded OH is substantially removed by annealing and that the extent of its formation is reduced by using buffered (lithium benzoate/benzoic acid) melts. It is suggested that hydrogen-bonded OH groups are responsible for many of the problems associated with proton-exchanged waveguides. Therefore, implementation of either annealing or buffered melts as part of the fabrication process is required to realize good-quality proton-exchanged waveguides.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A description is given of the IRIDIUM communication system, so-called because the system design originally consisted of 77 networked satellites, and the element iridium has the atomic number 77. The goal is to make instant global communications a reality. The system design now consists of 60 satellites, a system control facility, gateways, and subscriber units. Each of these components is examined.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The PowerPC 601 microprocessor, the first of a family of processors based on the PowerPC architecture, is described. The general-purpose processor contains a 32-Kb cache and a superscalar machine organization that allows dispatch and execution of up to three instructions each clock cycle. The bus interface and storage control mechanisms can be configured for a wide range of system designs, from low-cost desktop personal computers to high-performance multi-processor systems. The PowerPC architecture, machine organization, chip packaging technology, and performance are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>