Raytheon Technologies (United Kingdom)

The wide band-gap of Silicon Carbide (SiC) makes it a material suitable for high temperature integrated circuits [1], potentially operating up to and beyond 450°C. This paper describes the development of a 15V SiC CMOS technology developed to operate at high temperatures, n and p-channel transistor and preliminary circuit performance over temperature achieved in this technology.

Silicon Carbide devices are capable of operating as a semiconductor at high temperatures and this capability is being exploited today in discrete power components, bringing system advantages such as reduced cooling requirements [1]. Therefore there is an emerging need for control ICs mounted on the same modules and being capable of operating at the same temperatures. In addition, several application areas are pushing electronics to higher temperatures, particularly sensors and interface devices required for aero engines and in deep hydrocarbon and geothermal drilling. This paper discusses a developing CMOS manufacturing process using a 4H SiC substrate, which has been used to fabricate a range of simple logic and analogue circuits and is intended for power control and mixed signal sensor interface applications [2]. Test circuits have been found to operate at up to 400°C. The introduction of a floating capacitor structure to the process allows the use of switched capacitor techniques in mixed signal circuits operating over an extended temperature range.

The ability to predict the natural fragmentation of an explosively loaded metal casing would represent a significant achievement. Physically-based material models permit the use of small scale laboratory tests to characterise and validate their parameters. The model can then be directly employed to understand and design the system of interest and identify the experiments required for validation of the predictions across a wide area of the performance space. This is fundamentally different to the use of phenomenologically based material algorithms which require a much wider range of characterisation and validation tests to be able to predict a reduced area of the performance space. Eulerians numerical simulation methods are used to describe the fragmentation of thick walled EN24 steel cylinders filled with PBXN-109 explosive. The methodology to characterise the constitutive response of the material using the physically based Armstrong–Zerilli constitutive model and the Goldthorpe path dependent fracture model is described, and the results are presented. The ability of an Eulerian hydrocode to describe the fragmentation process and reproduce the experimentally observed fragment mass and velocity distributions is presented and discussed. Finally the suitability of the current experimental analysis methodology for simulation validation is addressed.

The goal of this paper is to estimate the k most central nodes in a network through parsimonious sampling. Centrality determines the relative importance of a particular node within the network. Conventional measures of node centrality include degree, betweenness, and closeness.

For the relocatable over the horizon radar (ROTHR) counter-drug radar system accurate knowledge of target position is an important part of the detection and interdiction of drug smuggling aircraft. An improvement in the radar's target track positional accuracy has been obtained by using external reference sources at known locations in the radar coverage area. Tracks formed on these reference sources provide position corrections that are applied to targets for removal of common bias errors due to ionospheric modeling uncertainties. Results from a 1993 R&D study show that such corrections must be applied independently for each propagation mode comprising a track in order to achieve the most improvement in positional accuracy. Additional data taken in 1996 has enabled investigations into the relationship between target distance from the reference source and the amount of positional improvement obtained by correcting a target.

This paper presents the characteristics and performance of a range of Silicon Carbide (SiC) CMOS integrated circuits fabricated using a process designed to operate at temperatures of 300°C and above. The properties of Silicon carbide enable both n-channel and p-channel MOSFETS to operate at temperatures above 400°C [1] and we are developing a CMOS process to exploit this capability [4]. The operation of these transistors and other integrated circuit elements such as resistors and contacts is presented across a temperature range of room temperature to +400°C. We have designed and fabricated a wide range of test and demonstrator circuits. A set of six simple logic parts, such as a quad NAND and NOR gates, have been stressed at 300°C for extended times and performance results such as propagation delay drive levels, threshold levels and current consumption versus stress time are presented. Other circuit implementations, with increased logic complexity, such as a pulse width modulator, a configurable timer and others have also been designed, fabricated and tested. The low leakage characteristics of SiC has allowed the implementation of a very low leakage analogue multiplexer showing less than 0.5uA channel leakage at 400°C. Another circuit implemented in SiC CMOS demonstrates the ability to drive SiC power switching devices. The ability of CMOS to provide an active pull up and active pull down current can provide the charging and discharging current required to drive a power MOSFET switch in less than 100ns. Being implemented in CMOS, the gate drive buffer benefits from having no direct current path from the power rails, except during switching events. This lowers the driver power dissipation. By including multiple current paths through independently switched transistors, the gate drive buffer circuit can provide a high switching current and then a lower sustaining current as required to minimize power dissipation when driving a bipolar switch.

Operation of SiC MOSFETs beyond 300°C opens up opportunities for a wide range of CMOS based digital and analogue applications. However the majority of the literature focuses only on the optimization of a single type of MOS device (either PMOS or more commonly NMOS) and there is a lack of a comprehensive study describing the challenge of optimizing CMOS devices. This study reports on the impact of gate oxide performance in channel implanted SiC on the electrical stability for both NMOS and PMOS capacitors and transistors. Parameters including interface state density ( D it ), flatband voltage ( V FB ), threshold voltage ( V TH ) and effective charge ( N EFF ) have been acquired from C-V characteristics to assess the effectiveness of the fabrication process in realising high quality gate dielectrics. The performance of SiC based CMOS transistors were analyzed by correlating the characteristics of the MOS interface properties, the MOSFET 1/f noise performance and transistor on-state stability at 300°C. The observed instability of PMOS devices is more significant than in equivalent NMOS devices. The results from MOS capacitors comprising interface state density ( D it ), flatband voltage ( V FB ), threshold voltage ( V TH ) for both N and P MOS are in agreement with the expected characteristics of the respective transistors.

View Video Presentation: https://doi.org/10.2514/6.2022-4004.vid The identification of unmanned aircraft systems (UAS) using trajectory data is considered. Specifically, a number of smoothness metrics are proposed, which can be used to distinguish UAS from other aerial objects even when they are engaged in accelerative maneuvers (non-constant-velocity flight). The metrics are evaluated on a data set from a UAS sense-and-avoid field test, which contains track data of aerial objects recorded by a vehicle-board radar system during a flight test. The metrics are found to effectively differentiate UAS from other objects such as birds for this data set. In addition, an initial statistical performance analysis of one of the smoothness metrics is undertaken, using 15 data sets deriving from multiple flight tests. The smoothness metric is shown to identify the target UAS with 95% accuracy (95% true positive rate), while achieving a false positive rate of less than 9%.

The development of silicon carbide complimentary metal-oxide-semiconductor (CMOS) is a key-enabling step in the realisation of low power circuitry for high-temperature applications. This paper describes investigations using the charge pumping technique into the properties of the gate dielectric interface as part of the development of the technology to realise monolithic fabrication of both n and p channel devices. A comparison of the charge pumping technique and the Hill-Coleman and Terman methods is also carried out to explore the feasibility of the technique.

The recent development of silicon carbide complimentary metal-oxide-semiconductor (CMOS) is a key enabling step in the realisation of low power circuitry for high temperature applications, such as aerospace and well logging. This paper describes investigations into the properties of the gate dielectric as part of the development of the technology to realize monolithic fabrication of both n and p channel devices. A comparison of the oxide quality of the silicon carbide CMOS transistors is performed to examine the feasibility of this technology for high temperature circuitry.

We present the influence of phosphorous auto-doping on the characteristics of the oxide interface in 4H-SiC following high temperature gate oxide annealing. IV characteristics show no evidence of direct tunnelling breakdown; however Fowler Nordheim (F-N) conduction is observed in high electric field with the oxides able to sustain >10MV/cm. Capacitance Voltage data show D IT <1x10 12 eV -1 cm -2 close to the conduction band edge after POA, with undoped samples demonstrating D IT below 5x10 11 eV -1 cm -2 . Photo CV data indicates smaller flat band voltage shifts of 0.6V at midpoint for the undoped samples, in comparison to 0.9V for the phosphorous doped devices. Temperature and bias stress tests at 200°C showed marginal hysteresis (0.3V) in both wafers. Reliability of time-dependent constant current and constant voltage characteristics revealed higher TDDB lifetimes in the undoped wafer. We conclude that the unintentional incorporation of phosphorous into the gate stack as a result of high temperature POA of the doped field oxide leads to a variation in flat band shift, higher D IT , and lower dielectric reliability.

Low frequency noise in 4H-SiC lateral p-channel metal oxide semiconductor field effect transistors (PMOSFETs) in the frequency range from 1 Hz to 100 kHz has been used to investigate the relationship between gate dielectric fabrication techniques and the resulting density of interface traps at the semiconductor-dielectric interface in order to examine the impact on device performance. The results show that the low frequency noise characteristics in p-channel 4H-SiC MOSFETs in weak inversion are in agreement with the McWhorter model and are dominated by the interaction of channel carriers with interface traps at the gate dielectric/semiconductor interface.

A high-temperature silicon carbide power module using CMOS gate drive technology and discrete power devices is presented. The power module was aged at 200V and 300 °C for 3,000 hours in a long-term reliability test. After the initial increase, the variation in the rise time of the module is 27% (49.63ns@1,000h compared to 63.1ns@3,000h), whilst the fall time increases by 54.3% (62.92ns@1,000h compared to 97.1ns@3,000h). The unique assembly enables the integrated circuits of CMOS logic with passive circuit elements capable of operation at temperatures of 300°C and beyond.

Traditional hierarchical clustering algorithms require the calculation of a dissimilarity matrix which is mapped to a binary tree or 'dendogram' based upon some predetermined criterion. Although 'optimally efficient' algorithms requiring O(N<SUP>2</SUP>) time and O(N) storage are known for several clustering methods, with few exceptions these algorithms are relatively inefficient in practice as many pairwise distance are measured which are not necessary for generation of the binary tree. We describe here a novel 'almost single link' algorithm which is efficient both theoretically and in practice, and which can be extended to provide fast algorithms for centroid, medium and single link clustering of large data sets. Generalization to other related clustering methods is expected to be straightforward. Our algorithm also suggests a fairly efficient method for generating minimal spanning trees. In performing the segmentation we employ a particular representation of the binary tree which simplifies the task of manual investigation of the hierarchy. A customized graphical user interface including a 2D scatter plot, a visual display of the dendogram, and a false color image with overlayered clusters makes the clustering procedure a highly interactive one. By suggesting, for each of the clustering methods, possible criteria which might be useful for extracting relevant clusters from the tree information, we are able to fully automate the cluster selection procedure and thereby further reduce the effort required to segment an image. The algorithms described have been transcribed into C code and combined into a single package, the 'hierarchical agglomerative clusterer', which has been applied to the analysis of hyperspectral image data of various forest and desert scenes acquired by the HYDICE sensor. The analyses were performed on a 266 Mhz Pentium PC platform running Windows NT 4.0. Typical segmentation times for the fastest algorithm ranged form 17 seconds for a 15232-pixel image to 2833 seconds for a 209840-pixel image, each pixel representing a 210-band spectrum. These initial studies suggest that the HAC package will provide a sound framework for making detailed comparisons of the effects of different clustering algorithms or dissimilarity measures. Its overall speed makes it a promising tool not only for hyperspectral image processing applications but for multivariate data analysis as a whole.

We demonstrate the influence of enhancing the dielectric film used to form the gate in complimentary MOS circuits, designed for high temperature operation. The data show that the characteristics of both n-MOS and p-MOS capacitors and transistors have degraded capacitance characteristics in terms of the trapped charge in the dielectric, although the interface state density is dictated by the underlying stub oxide, at around 5×10 12 cm -2 eV -1 . The use of a deposited oxide also reduces the variability in the critical electric field in the oxide, whilst maintaining a value of approximately 10MV cm -1 . The channel mobility extracted from n-and pMOS transistors fabricated alongside the capacitors showed similar values, of approximately 3.8 cm 2 V -1 s -1 , which are limited by the high doping level in the epilayers used in this study.

Spectral unmixing algorithms tend to make the simplifying assumptions that each type of material in a spectral library may be represented by a single reference spectrum and that the mixing process is linear. While these assumptions are convenient in that they allow techniques of linear algebra to be used, they lack realism as each material type in a spectral image will in general emit a distribution of spectra while the mixing itself need not be linear. We describe a 'common sense' spectral unmixing algorithm for the general case where endmembers are described by arbitrary D-dimensional probability distribution and the mixing can be non-linear. As an application we outline an unsupervised procedure for deriving the fractional material content of every pixel in an image and identifying anomalies given no a priori knowledge. Accurate endmember distribution are obtained by first masking out impure pixels using locally normalized Sobel and Laplacian filters and then performing single-link hierarchical clustering on the pure pixels which remain. The most probable endmember decomposition for a given target spectrum is found by selecting an appropriate set of endmembers based on the target's immediate neighborhood, and performing a constrained maximum likelihood search over the space of fractional abundances. We also explain how the procedure may be applied to subpixel and anomaly detection. To illustrate our ideas the techniques described are applied to biomedical images throughout.

The Verification Kit furnished by Hawlatt Packard for checking the performance of the HPB51.0 analyzer, was measured and compared with the ARFTG Travelling Experiment Kit, The HP Verification Kit 18 used several tinea each year to assure that the HP8510 1s within specification limits.

ABSTRACT Reinforcement learning (RL) has shown to be effective for simple automated cyber defence (ACD) type tasks. However, there are limitations to these approaches that prevent them from being deployed onto real‐world hardware. Trained RL policies will often have limited transferability across even small changes to the environment setup. Instability during training can prevent optimal learning, a problem that only increases as the environment scales and grows in complexity. This work looks at addressing these limitations with a zero‐shot transfer approach based on multi‐agent RL. This is achieved by partitioning the task into smaller network machine subtasks, where agents learn the solution to the local problem. These local agents are independent of the network scale and can therefore be transferred to larger networks by mapping the agents to machines in the new network. Initial experiments show that this transfer method is effective for direct application to a number of ACD tasks. It is also shown that its performance is robust to changes in network activity, attack scenario and reduces the effects of network scale on performance.

The application of Automatic Interfacing in a computer program is described giving examples. When computer programs are structured to make choices possible then they may learn from these answers so that tasks may be automatically performed when desired. Structured programming accounts for the defaults to these answers and also allows the operator to implement changes via switches or change commands. The examples given explain the features added by the logic which remembers previous answers. In my definition, the Automatic Interfacing Program must contain four sections. 1. The first section, called "Learning", is the input section which should do more than just accept information. It should check to see if the information is valid within numerical limits, or valid within syntactic limits. If not, at this point, the program should correct for any mistakes on input. 2. The second section of a controlled program, I have called the "Decision Section". It is at this point that choices art to be made and truth tables eatablished for the rules which are governing the decisions. This may require exacting calculations in order to provide the basis for decision. In all cases, the decision should be registered in an accessible database form for easy observation. It is at this point that a branch should also be made to a "Forgiveness" section, where changes can be made if the logic does not give satisfactory resu1ts. 3. The third section of the computer program is commonly called the "Action" section, or the "Output".

PATRIOT is a highly sophisticated air-defense guided-missile system designed to be effective against aircraft representing the field army defense threat of the 1980s and 1990s. An overview is given of this comprehensive system which satisfies reliability, availability, and maintainability (RAM) analysis requirements and which now functions to monitor system performance and support related product assurance efforts. A user-friendly computer prompting system is available to local and remote authorized users to access product assurance data specific to their needs. These data serve to monitor system performance with respect to requirements, highlight problem situations, identify items which require improvement, and provide feedback to both the military users and the various manufacturer's groups concerned with the PATRIOT system and associated with its design, production, and support.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>