Samsung (Germany)

This paper presents a magnetic resonance wireless power transfer (WPT) system that uses three coils, a planar receiver and operates at 6.78 MHz,. Effective power transfer is ensured by establishing an impedance matching condition for this WPT system. A metamaterial (MTM) array having dimensions of 20 cm X 30 cm is also positioned near the load coil to concentrate the magnetic field and enhance the transfer efficiency. The result is a maximal improvement of 27% in the transfer efficiency at a transfer distance of 50 cm. The impact of a ground plane on the transfer efficiency is also examined. By utilizing the MTM array, making slits on the ground plane and increasing the gap between the ground plane and the load coil, it is possible to mitigate this impact. The highest transfer efficiency improvement is about 55% at a distance of 20 cm with the ground plane. A practical laptop model is fabricated to verify the impact of the load coil angle and position on the transfer efficiency. The result shows that the maximum transfer efficiency with the laptop model is 47.58% with the load coil angle of 90 degree.

This paper provides an overview of some specific control plane functionality that has developed in the 3GPP architecture, from GPRS to EPC and now the 5G core network.Innovations of the 5G control plane are considered in the areas of selecting and maintaining the control plane topology, as well as the handling of state within the network.

This contribution shows that a monolithic integrated silicon bipolar circuit can provide phase and frequency locked loop (PFLL) based clock recovery and data regeneration up to 8Gb/s. Moreover, phase and frequency detector (PFD) operation up to 15Gb/s (with an external VCO) is demonstrated. Owing to the wide tuning range of the quadrature VCO, the circuit lends itself to operation over a wide range of bit rates. Other applications of the quadrature VCO, e.g. as a synthesizer, are possible. As shown by circuit simulations, the operating frequency can be extended beyond 1OGHz, if a small unbalance between both ring oscillator stages is eliminated by minor design changes.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A novel dual six-port network analyzer calibration procedure is presented. The calibration algorithm is based on a full model. Calibration measurements with TMSO and three other unknown standards are sufficient to calculate the error coefficients of the analyzer. Besides this, a simple and unique determination of error corrected scattering parameters of any device under test (DUT) is presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Implantable infusion pumps might improve the convenience and safety of intravenous treprostinil for pulmonary arterial hypertension. The LENUS Pro® pump (approved in Europe) has a fixed flow rate. Based on 126 pumps and 2853 refills, we retrospectively analyzed the actual flow rate from 09/2010 to 09/2018. A relevant flow rate variance is evident after three years; therefore, flow rate monitoring and dose adjustment are mandatory.

For a network analyzer some error corrected impedance or two-port measurements are presented. These ZU and YU self-calibration procedures only need one known and one or two unknown impedances for the calibration process. The good performance of these simple methods is demonstrated by experimental results.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Software applications use dynamic memory (allocated and deallocated in the system's heap) to handle dynamism in their working conditions. Embedded systems tend to include complex memory organizations but most techniques for dynamic memory management do not deal with the placement of data objects in physical memory modules. Additionally, the performance of hardware-controlled cache memories may be severely hindered when used with linked data structures. We therefore present a methodology to map dynamic data on the multilevel memory subsystem of embedded systems, taking advantage of any available memories (e.g., on-chip SRAMs) and avoiding interference with the cache memories. The resulting data placement uses an exclusive memory model and is compatible with existing techniques for managing static data. Our methodology helps the designer achieve reductions in energy consumption and execution time that can be obtained by an expert in an automated way while keeping control over the process through multiple configuration knobs.

An automatically controlled calibration procedure will be presented which is based on a virtual transformation of calibration standards. The basic element is a switching network added to the network analyzer. This network is a part of the analyzer, so it will not be removed after the calibration has been finished. It is not necessary to know the characteristics of the single switching states. Compared with commercially available procedures the expense of the new calibration technique is decreased.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

In this paper, a new type of PWM series resonant converter is proposed. One pole of the proposed converter is switching at zero-current and the other is switching at zero-voltage. By introducing an auxiliary inductor, zero-voltage switching is possible even at no load. The proposed converter is suitable for a high-voltage DC/DC converter because the voltage stresses of switching devices are minimized.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>