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Accelerating equalization algorithms using the Xtensa configurable processor

Published • Jun 1, 2005
NobleIDNI6P27W21R15S81
Authors:
B. Tanguay
,
Yvon Savaria
,
Mohamad Sawan

Abstract

This paper deals with the design and implementation of two equalizers for telecommunications applications. The required performance cannot be achieved using general-purpose embedded processors. On the other hand, application specific instruction-set processors (ASIP) allow accelerating sections of c...

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