Optimization of PET (Post Etch Treatment) steps to enlarge queue time and decrease defect counts in Ultra low-k material AIO (all in one) etch processes

To reduce the RC interconnect delays and cross-talk noise associated with the sub-28 nm advanced CMOS technology nodes, Dual Damascene process combined with Ultra low-k material needs to be introduced into Integrated Circuits manufacturing. With pores and low density, Ultra low-k material can be eas... View More