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Effective processor array architecture with shared memory

Published • Dec 17, 2002
Authors:
Hiroaki Kunieda
,
Kesami Hagiwara

Abstract

In this paper, we propose a new processor array architecture with effective data storage schemes and its design methodology. The array, called the Memory Sharing Processor Array (MSPA), consists of a processor array with several memory units and their address generation hardware units in order to mi...

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