Effective processor array architecture with shared memory
Published • Dec 17, 2002
Authors:,
Hiroaki Kunieda
Kesami Hagiwara
Abstract
In this paper, we propose a new processor array architecture with effective data storage schemes and its design methodology. The array, called the Memory Sharing Processor Array (MSPA), consists of a processor array with several memory units and their address generation hardware units in order to mi...
Finding related papers...
Discussions
(0)No comments yet
Be the first to share your thoughts!