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Test Data Compression Using Multiple Run Length Code Technique

Published • Jan 31, 2014
NobleIDNI5P01W96R35S94
Authors:
B. Manjurathi
,
R. Hari Kumar
,
P. Nirmal Kumar

Abstract

System on chip is challenging, for both design and testing engineers due to its increase in power consumption. In test mode, the volume of the test data is extremely high when compared to normal mode, the switching activity which takes place between the test data thereby increases power consumption....

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