Testability-Driven Random Test-Pattern Generation
Published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems • Nov 1, 1987
NobleIDNI1P29W88R50S79
Authors:,,
R. Lisanke
F. Brglez
A.J. de Geus
Abstract
This paper presents ESPRIT, an automatic test pattern generation (ATPG) system for testing single stuck-at faults in combinational logic. ESPRIT generates test patterns by performing fault simulation on random patterns derived from nonuniformly distributed input signal probabilities. The system comp...
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