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High performance gate-level simulation with GP-GPU computing

Published • Apr 1, 2011
NobleIDNI4P01W91R34S02
Authors:
Valeria Bertacco
,
Debapriya Chatterjee

Abstract

Functional verification of modern digital designs is a mission critical and time-consuming task. Verification is essential since it ensures the correctness of the final product; however, due to the complexity of modern designs, verification has become the primary bottleneck of time to market. Logic ...

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