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FlashCache

Published • Oct 22, 2006
NobleIDNI6P31W15R71S43
Authors:
Taeho Kgil
,
Trevor Mudge

Abstract

We propose an architecture that uses NAND flash memory to reduce main memory power in web server platforms. Our architecture uses a two level file buffer cache composed of a relatively small DRAM, which includes a primary file buffer cache, and a flash memory secondary file buffer cache. Compared to...

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