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Balanced Distributed Memory Parallel Computers

Published • Aug 1, 1993
NobleIDNI5P60W80R71S79
Authors:
Franck Cappello
,
J-L. Béchennec
,
Franck Delaplace

Abstract

Mismatches between on-chip high performance CPU and data access times is the basic reason for the increasing gap between peak and sustained performance in distributed memory parallel computers. We propose the concept of balanced architectures, based on a network with a dynamic topology and communica...

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