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Journal article
Array-based analog computation
A. Krämer
IEEE Micro1 Jan 1996
Array-based analog computation
A. Krämer · IEEE Micro · 1 Jan 1996
Abstract
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The Innovative Systems Design Group at SGS-Thomson Microelectronics has been exploring analog implementations of neural network architectures with special emphasis on efficiency, precision, and large-scale implementation. We are developing three large-scale analog VLSI chips, all of which work on image-processing problems. Because of their efficiency and regularity, analog computing arrays form the basis of our designs, which use current, charge, and conductance computing modes. We have also investigated the use of floating-gate flash-EEPROM devices for both nonvolatile analog storage and computation.
Identifiers
- NobleID
- NI8P53W30R33S77
Discussion
Citations
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Details
- Published
- 1 Jan 1996
- Publisher
- Institute of Electrical and Electronics Engineers
- Issue
- Volume 16 · Issue 5 · Pages 20–29
- ISSN
- 0272-1732
- Language
- EN