A column-based processing array for high-speed digital image processing
Published • Jan 1, 1999
NobleIDNI9P13W35R31S05
Authors:,,
Tim Morris
E. J. Fletcher
C. Afghahi
Abstract
We present a novel architecture for column-based image processing within an integrated CMOS sensor chip. The system includes a two-dimensional array of active pixel sensors, a one-dimensional array of analog-to-digital converters along one side of the sensor array, an array of static random access m...
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