PASIC. A sensor/processor array for computer vision
Published • Dec 4, 2002
Authors:,,
K. Chen
P.-E. Danielsson
Anders Åström
Abstract
The PASIC prototype chip contains 256*256 photosensors, a linear array of 256 A/D converters, two 256 8-bit shift registers, 256 bit-serial processors, and a 256*256 bit dynamic RAM. It appears to be a viable architecture for low-level vision processing. The processors operate in SIMD model at 20 MH...
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