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Processing Rate Optimization by Sequential System Floorplanning

Published • Apr 6, 2006
NobleIDNI8P63W96R61S60
Authors:
Jia Wang
,
Haidong Zhou
,
Ping-Chih Wu

Abstract

The performance of a sequential system is usually measured by its frequency. However, with the appearance of global interconnects that require multiple clock periods to communicate the throughput is usually traded-off for higher frequency (for example, through wire pipelining or latency insensitive ...

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