NobleBlocks
Public

Logic simulation system using simulation processor (SP)

Published in Design Automation Conference • Jun 1, 1988
Authors:
Masaki Saitoh
,
Kiyoshi Iwata
,
Akihiro Nakamura

Abstract

This paper describes a (special-purpose) logic simulation processor (SP) and a software system for the SP for use in verifying the design of computers and other logic devices. Our system can evaluate a logic circuit containing 4 million logic primitives and 32M bytes of memory at a maximum speed of ...

Finding related papers...

Discussions

(0)

No comments yet

Be the first to share your thoughts!