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High performance processor array for image processing

Published • May 1, 2007
Authors:
Péter Földesy
,
Ákos Zarándy
,
Csaba Rekeczky

Abstract

The ASIC implementation of a digital cellular visual microprocessor architecture is introduced. The processor array is constructed of simple, locally interconnected 8 bit microprocessors, operating in an extended SIMD mode. The processor array can be equipped with on-chip photo diode array, using 3D...

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