Functional memory (FM) uses memory mapped reprogrammable field programmable gate arrays (FPGAs) for fine-grained parallel processing. Multi-operand expressions are computed in combinational logic eliminating processor computation steps. FPGAs capture operands as memory is written, eliminating separate processor load-stores to pass operands. This paper describes how program expressions can be implemented in FM, including branch address computations. It concludes with a load store analysis comparing a conventional von Neumann processor with and without FM for a shortest path program. The load store count stays about the same but eliminating the computation steps results in a one-third step reduction overall with FM.