NobleBlocks
Public

Configurable microcontroller array

Published • Jun 26, 2003
NobleIDNI2P43W59R11S68
Authors:
Oleg V. Maslennikov
,
Juri Shevtshenko
,
Anatoli Sergyienko

Abstract

In this paper, the configurable microcontroller array based on the i8051 processor unit (PU) architecture is proposed. The use of the well-known PU architecture simplifies the application programming. The designed microcontroller PU core has in 6 times higher instruction implementation speed, and in...

Finding related papers...

Discussions

(0)

No comments yet

Be the first to share your thoughts!