Processor autonomy is the potential of a processing element in a parallel computer to act differently from other processors during execution. A new parallel architecture taxonomy is presented that includes the necessary and sufficient conditions to achieve processor autonomy. Processor autonomy is possible when multiple data address, data value, instruction address, or instruction value streams are available. Parallel program execution can be significantly aided by processor autonomy, allowing various mappings and dynamic reassignment of PEs to streams. Parallel program performance is evaluated for several sorting algorithms using one form of data address autonomy, indirect addressing, and one form of instruction value autonomy, branch selection.