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Software Trace Cache

Published in IEEE Transactions on Computers • Nov 30, 2004
Authors:
A. Ramirez
,
Josep-L. Larriba-Pey
,
Mateo Valero

Abstract

We explore the use of compiler optimizations, which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying hardware resources regardless of the specific details of the processor/architecture in order to increase fetch performance. The Sof...

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