Future high performance ECL microprocessors
Published • Jan 1, 1990
NobleIDNI8P43W82R48S58
Authors:
G.R. Wilson
Abstract
The advancement of bipolar VLSI technology coupled with the lower complexity of RISC (reduced instruction set computer) architectures has made possible bipolar ECL (emitter coupled logic) implementations of single-chip instruction units with much higher clock rates. It is projected that future RISC ...
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