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MARCH

Published • May 23, 2019
NobleIDNI9P14W24R67S65
Authors:
Jingsong Chen
,
Jinwei Liu
,
Gengjie Chen

Abstract

The continuous development of modern VLSI technology has brought new challenges for on-chip interconnections. Different from classic net-by-net routing, bus routing requires all the nets (bits) in the same bus to share similar or even the same topology, besides considering wire length, via count, an...

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