Parallel Bit Pattern Computing
Published • Oct 1, 2019
NobleIDNI0P77W23R70S15
Authors:
Henry G. Dietz
Abstract
There are many ways to reduce power consumed in performing a computation. Most focus on making each gate more power efficient. In contrast, the current work focuses on directly reducing the number of gate-level operations needed to produce each word-level result. Compiler optimization of computation...
Finding related papers...
Discussions
(0)No comments yet
Be the first to share your thoughts!