Error Detection Using Dynamic Dataflow Verification
Published in Proceedings of the ... Conference on Parallel Architectures and Compilation Techniques/Proceedings of the Conference on Parallel Architectures and Compilation Techniques • Sep 1, 2007
NobleIDNI7P83W13R71S24
Authors:,
Albert Meixner
Daniel J. Sorin
Abstract
A significant fraction of the circuitry in a modern processor is dedicated to converting the linear instruction stream into a representation that allows the execution of instructions in data dependence order, rather than program order, to extract instruction level parallelism. All errors caused by h...
Finding related papers...
Discussions
(0)No comments yet
Be the first to share your thoughts!