Morphable Cache Architectures
Published • Aug 1, 2001
NobleIDNI5P35W81R49S91
Authors:,,
I. Kadayif
Mahmut Kandemir
N. Vijaykrishnan
Abstract
Computer architects have tried to mitigate the consequences of high memory latencies using a variety techniques. An example of these techniques is multi-level caches to counteract the latency that results from having a memory that is slower than the processor. Recent research has demonstrated that c...
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