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Published in ACM SIGARCH Computer Architecture News • Jun 4, 2011
NobleIDNI1P87W88R16S90
Authors:
Mehrtash Manoochehri
,
Murali Annavaram
,
Michel Dubois

Abstract

Due to shrinking feature sizes processors are becoming more vulnerable to soft errors. Write-back caches are particularly vulnerable since they hold dirty data that do not exist in other memory levels. While conventional error correcting codes can protect write-back caches, it has been shown that th...

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