Python Based Testbench for Coverage Driven Functional Verification
Published in 2022 7th International Conference on Integrated Circuits and Microsystems (ICICM) • Oct 28, 2022
NobleIDNI3P28W13R68S71
Authors:,,
Honglei Liang
Nianxiong Tan
Yang Ren
Abstract
As digital design gets more complex, verification takes more efforts and it increasingly costs more than the design. The common verification practice of using the universal verification methodology (UVM)/system verilog (SV) has a higher entry barrier than using one of the most popular language Pytho...
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