Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing
Published in 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC) • Jan 22, 2024
NobleIDNI8P67W56R94S56
Authors:,,
Xiaolan Zhao
Zhaori Bi
Changhao Yan
Abstract
For analog circuit sizing, constrained multi-objective optimization is an important and practical problem. With the popularity of multi-core machines and cloud computing, parallel/batch computing can significantly improve the efficiency of optimization algorithms. In this paper, we propose an Asynch...
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