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Power optimized programmable embedded controller

Published in arXiv (Cornell University) • Sep 9, 2010
NobleIDNI5P37W17R63S79
Authors:
M. Kamaraju
,
K. Lal Kishore
,
A. V. N. Tilak

Abstract

Now a days, power has become a primary consideration in hardware design, and is critical in computer systems especially for portable devices with high performance and more functionality. Clock-gating is the most common technique used for reducing processor's power. In this work clock gating techniqu...

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