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Source Code Verification for Embedded Systems using Prolog

Published in arXiv (Cornell University) • Jan 3, 2017
NobleIDNI2P46W06R70S98
Authors:
Frank Flederer
,
Ludwig Ostermayer
,
Dietmar Seipel

Abstract

System relevant embedded software needs to be reliable and, therefore, well tested, especially for aerospace systems. A common technique to verify programs is the analysis of their abstract syntax tree (AST). Tree structures can be elegantly analyzed with the logic programming language Prolog. Moreo...

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