Texas Instruments (France)

This paper presents a complete set of blocks implemented in the popular MATLAB SIMULINK environment, which allows designers to perform time-domain behavioral simulations of switched-capacitor (SC) sigma-delta (/spl Sigma//spl Delta/) modulators. The proposed set of blocks takes into account most of the SC /spl Sigma//spl Delta/ modulator nonidealities, such as sampling jitter, kT/C noise, and operational amplifier parameters (white noise, finite DC gain, finite bandwidth, slew rate and saturation voltages). For each block, a description of the considered effect as well as all of the implementative details are provided. The proposed simulation environment is validated by comparing the simulated behavior with the experimental results obtained from two actual circuits, namely a second-order low-pass and a sixth-order bandpass SC /spl Sigma//spl Delta/ modulator.

In this paper, we present the full derivation of a new formula for calculating the mutual inductance between inclined circular filaments arbitrarily positioned with respect to each other. Although such a formula was already proposed by Grover more than 50 years ago, the formula presented here is slightly more general and simpler to use, i.e., it involves only a sequential evaluation of expressions and the numerical resolution of a simple numerical integration. We derived the new formula using the method of vector potential, as opposed to Grover's approach, which was based on the Neumann formula. We validated the new formula through a series of examples, which are presented here. Finally, we present the relationship between the two general formulas (i.e., Grover's and our new one) explicitly (Example 12).

A versatile method based on Raman microscopy was developed to follow the degradation of iron carboxylate Metal Organic Framework (MOF) nano- or micro-particles in simulated body fluid (phosphate buffer). The analysis of both the morphology and chemical composition of individual particles, including observation at different regions on the same particle, evidenced the formation of a sharp erosion front during particle degradation. Interestingly, this front separated an intact non eroded crystalline core from an amorphous shell made of an inorganic network. According to Mössbauer spectrometry investigations, the shell consists essentially of iron phosphates. Noteworthy, neither drug loading nor surface modification affected the integrity of the tridimensional MOF network. These findings could be of interest in the further development of next generations of MOF drug carriers.

The new generation of multimedia-application processors requires a drastic leakage reduction to bring the standby current to 50/spl mu/A. An efficient set of leakage reduction techniques, including power gating, memory retention, voltage scaling, and dual V/sub t/, is employed on a 50M transistor, 80mm/sup 2/ IC, fabricated in a 90nm CMOS technology, resulting in a 40/spl times/ leakage reduction.

The high performance Digital Signal Processors (DSPs) currently manufactured by Texas Instruments are heterogeneous multiprocessor architectures. Programming these architectures is a complex task often reserved to specialized engineers because the bottlenecks of both the algorithm and the architecture need to be deeply understood in order to obtain a fairly parallel execution. The PREESM framework objective is to simplify the programming of multicore DSP systems by building on dataflow programming methods. The current functionalities of this scalable framework cover memory and time analysis, as well as automatic deadlock-free code generation. Several tutorials are provided with the tool for fast initiation of C programmers to multicore DSP programming. This paper demonstrates PREESM capabilities by comparing simulation and execution performances on a stereo matching algorithm prototyped on the TMS320C6678 8-core DSP device.

Dataflow models of computation are widely used for the specification, analysis, and optimization of Digital Signal Processing (DSP) applications. In this paper a new meta-model called PiMM is introduced to address the important challenge of managing dynamics in DSP-oriented representations. PiMM extends a dataflow model by introducing an explicit parameter dependency tree and an interface-based hierarchical compositionality mechanism. PiMM favors the design of highly-efficient heterogeneous multicore systems, specifying algorithms with customizable trade-offs among predictability and exploitation of both static and adaptive task, data and pipeline parallelism. PiMM fosters design space exploration and reconfigurable resource allocation in a flexible dynamic dataflow context.

Summary Compressed bitmap indexes are used in databases and search engines. Many bitmap compression techniques have been proposed, almost all relying primarily on run‐length encoding (RLE). However, on unsorted data, we can get superior performance with a hybrid compression technique that uses both uncompressed bitmaps and packed arrays inside a two‐level tree. An instance of this technique, Roaring, has recently been proposed. Due to its good performance, it has been adopted by several production platforms (e.g., Apache Lucene, Apache Spark, Apache Kylin, and Druid). Yet there are cases where run‐length‐encoded bitmaps are smaller than the original Roaring bitmaps—typically when the data are sorted so that the bitmaps contain long compressible runs. To better handle these cases, we build a new Roaring hybrid that combines uncompressed bitmaps, packed arrays, and RLE‐compressed segments. The result is a new Roaring format that compresses better. Overall, our new implementation of Roaring can be several times faster (up to two orders of magnitude) than the implementations of traditional RLE‐based alternatives (WAH, Concise, and EWAH) while compressing better. We review the design choices and optimizations that make these good results possible. Copyright © 2016 John Wiley & Sons, Ltd.

A fully integrated GSM/GPRS quad-band transceiver is presented. It includes the receiver, the transmitter, the synthesizer, all necessary voltage-controlled oscillators, all loop filters, the voltage regulators, the voltage-controlled crystal oscillator, and the power amplifier controller. The chip meets all GSM specification. The design was done in a BiCMOS SiGe 0.35-μm technology and the die area is 14 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

Summary Compressed bitmap indexes are used in systems such as Git or Oracle to accelerate queries. They represent sets and often support operations such as unions, intersections, differences, and symmetric differences. Several important systems such as Elasticsearch, Apache Spark, Netflix's Atlas, LinkedIn's Pivot, Metamarkets' Druid, Pilosa, Apache Hive, Apache Tez, Microsoft Visual Studio Team Services, and Apache Kylin rely on a specific type of compressed bitmap index called Roaring. We present an optimized software library written in C implementing Roaring bitmaps: CRoaring. It benefits from several algorithms designed for the single‐instruction–multiple‐data instructions available on commodity processors. In particular, we present vectorized algorithms to compute the intersection, union, difference, and symmetric difference between arrays. We benchmark the library against a wide range of competitive alternatives, identifying weaknesses and strengths in our software. Our work is available under a liberal open‐source license.

In this paper, we present IVA-HD, a true multistandard, programmable, full HD video coding engine which adopts optimal hardware-software partitioning to achieve the low-power and area requirements of the OMAP 4 processor. Unlike the approach of using separate IPs for encoder and decoder, IVA-HD uses an integrated codec engine which is area efficient, as most of the decoder logic is reused for the encoder. IVA-HD is architected to perform stream-rate and pixel- rate processing in a single pipeline (that processes one 16x16 macroblock at a time), so as to support the latency requirements of video conferencing.

In an effort to extend battery life, the manufacturers of portable consumer electronics are continually driving down the supply voltages of their systems. For example, next-generation cellular phones are expected to utilize a 1-V power supply for their digital component. To address this market, an energy-efficient, programmable digital signal processing (DSP) chip that operates from a 1-V supply has been designed, fabricated, and tested. The DSP features an instruction set and micro-architecture that are specifically targeted at wireless communication applications and that have been carefully optimized to minimize power consumption without sacrificing performance. The design utilizes a 0.35-/spl mu/m dual-V/sub t/ technology with 0.25-/spl mu/m minimum gate lengths that enables good performance at 1 V. Specifically, the chip dissipates 17 mW at 1 V, achieving 63-MHz operation with a power-performance metric of 0.21 mW/MHz.

A 3.3-V bandpass /spl Sigma//spl Delta/ modulator for IF sampling at 10.7 MHz in digital radio applications has been developed. The modulator presents a sixth-order single-loop architecture and features a 74-dB dynamic range in a 2OO-kHz signal bandwidth (FM signal), while for a 9-kHz signal bandwidth (AM signal) the dynamic range is 88 dB. The modulator has been integrated in a standard 0.35-/spl mu/m CMOS technology using switched-capacitor technique and consumes 76 mW from a single 3.3V supply.

A new linearization scheme is proposed, which compensates for nonlinear distortions experienced in the amplitude-modulation path of a digital polar EDGE transmitter integrated in a 65-nm CMOS transceiver system-on-chip (SoC) based on the Digital RF Processor (DRP) technology. The measured amplitude and phase distortions are stored in lookup tables and used for predistortion without requiring inversion computations, thus achieving significant complexity reduction. Adaptive linear interpolation along with adaptive resolution enhancement provides the desired performance across power levels. With the presented scheme, the transmitter's measured performance significantly exceeds the EDGE specifications with an error vector magnitude (EVM) of typically 3% and a close-in modulated spectrum of -64 dB at a 400-kHz offset from the carrier frequency.

This paper describes techniques for the design of high-resolution oversampling analog-to-digital converters based on current memories. A key point is the reduction of nonlinearities, in particular those introduced by the current switches. A current-memory cell with very high precision and linearity has been designed and used in an experimental third-order /spl Sigma/-/spl delta/ modulator in a 0.8-/spl mu/m digital CMOS process. A linearity of better than 14 b and a maximum signal-to-noise+distortion ratio (SNDR) of 80 dB has been measured for an oversampling ratio (OSR) of 64.

Localized electrical contact phenomena during wafer test can significantly affect contact resistance magnitude and stability of tungsten (W), tungsten-rhenium (WRe), beryllium-copper (BeCu), Pd-alloy (Paliney-7), and metallic-alloy (NewTek-Probe) probes. Typically, increased and unstable contact resistance (C/sub RES/) during aluminum wafer test at 85/spl deg/C with tungsten (W) and tungsten-rhenium (WRe) probe needles is attributed to adherent oxides from the aluminum bond pads. New experimental data indicates that oxide formation due to localized Joule heating at the probe tip contact "a-Spots" significantly contributes to the C/sub RES/ variations. Use of non-oxidizing probe materials could provide low and stable C/sub RES/ with reduced cleaning frequency at elevated temperatures. Preliminary production level beta testing on actual devices using NewTek probes demonstrated significant reductions in continuity failures, cleaning frequency, and operator intervention.

We report here a successful OMAPTM system design strategy where TLP information for both the external TVS and the IC pin were combined in an overall simulation procedure that includes the filtering response through the board components. The examples presented here specifically demonstrate the design strategy for a USB2 interface.

This article introduces a new technique to minimize the memory footprints of Digital Signal Processing (DSP) applications specified with Synchronous Dataflow (SDF) graphs and implemented on shared-memory Multiprocessor System-on-Chip (MPSoCs). In addition to the SDF specification, which captures data dependencies between coarse-grained tasks called actors, the proposed technique relies on two optional inputs abstracting the internal data dependencies of actors: annotations of the ports of actors, and script-based specifications of merging opportunities between input and output buffers of actors. Experimental results on a set of applications show a reduction of the memory footprint by 48% compared to state-of-the-art minimization techniques.

A GPRS GSM850/GSM/DCS/PCS fully integrated transceiver occupies 14mm/sup 2/ in 0.35/spl mu/m SiGe technology. A direct conversion receiver, transmitter, synthesizer, VCO, voltage regulators and loop filters are fully integrated. The chip meets the GPRS specifications including settling time of 105/spl mu/s in RX mode, NF of 3dB for GSM, TX phase error of 2/spl deg/ RMS, and PLL phase noise of -84dBc/Hz at a 1kHz offset at 3.6GHz.

BACKGROUND: Anti-epidermal growth factor receptor therapy is associated with skin adverse events not previously reported with conventional chemotherapy. Prophylactic actions are recommended, but routine clinical management of these toxicities and their impact on quality of life remain unknown. AIM: To assess the dermatological toxicities reported after panitumumab initiation, their impact on the quality of life and the clinical practices for their management. METHODS: Patients included in this prospective multicenter observational study were over 18 years of age and began treatment with panitumumab for wild-type KRAS metastatic colorectal cancer. The incidence of dermatological toxicities, clinical practices for their management and impact on quality of life were recorded during a 6-mo follow-up. RESULTS: Overall, 229 patients (males, 57.6%; mean age, 66.2 years) were included. At day 15, 59.3% of patients had dermatological toxicity; the rate peaked at month 2 (74.7%) and decreased at month 6 (46.5%). The most frequent dermatological toxicities were rash/acneiform rash, xerosis and skin cracks. At least one preventive treatment was administered to 65.9% of patients (oral antibiotics, 84.1%; emollients, 75.5%; both, 62.9%). The rates of patients who received at least one curative treatment peaked at month 2 (63.4%) and decreased at month 6 (44.8%). The impact of the dermatological toxicities on quality of life was limited as assessed with Dermatology Life Quality Index scores and inconvenience visual analogic scale score. The rates of topical corticosteroids administration and visits to specialists were low. CONCLUSION: The rates of the different skin toxicities peaked at various times and were improved at the end of follow-up. Nevertheless, their clinical management could be optimized with a better adherence to current recommendations. The impact of skin toxicities on patient's quality of life appeared to be limited.

An ESR investigation has been performed on two series of samples. The first one deals with reference compounds such as vanadyloctaethylporphyrin (VO(OEP)), V2S3 and vanadium supported on γ-alumina samples obtained by impregnation of tetrathio-vanadate followed by sulfidation with the H2-H2S mixture. The second series concerns V loaded catalysts obtained after a hydrodemetallation test - HDM - in a dynamic flow microreactor with a feed containing VO(OEP). The fresh catalysts are either pure γ-Al2O3, MOS2, or Ni-MoS2-γ-Al2O3. In each case,one or several species have been identified from the ESR spectra. Only on y-Al2O3 remains adsorbed VO(OEP) after the HDM test. On the other catalysts, the major detected species have been attributed to V in a sulfide environment. The result and conclusions deduced from this ESR study are in complete agreement with the catalytic behaviors of these V loaded catalysts.