A 12.5-mb/s to 2.7-Gb/s continuous-rate CDR with automatic frequency acquisition and data-rate readback

Dalton, D.; Seng Chai, Kwet; Evans, Eric; Ferriss, Mark; Hitchcox, D.; G. Murray, P.; Selvanayagam, S.; Shepherd, Paul; DeVito, L.

doi:10.1109/jssc.2005.856577

Public

A 12.5-mb/s to 2.7-Gb/s continuous-rate CDR with automatic frequency acquisition and data-rate readback

Shared by NobleBlocks on Dec 1, 2005 • 12:00 AM UTC

Authors:

D. Dalton

Kwet Seng Chai

Eric Evans

Abstract

A continuous-rate clock and data recovery (CDR) circuit that operates from 12.5 Mb/s to 2.7 Gb/s is described. The circuit automatically detects a change in input data rate, acquires the new frequency, and reports the data rate to the user without the need for an external reference clock or any prog...

Subject

Jitter

Bandwidth (computing)

Phase-locked loop

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